GS81302TT107E sram equivalent, 144mb sigmaddr-ii+ burst of 2 sram.
* 2.0 Clock Latency
* Simultaneous Read and Write SigmaDDRâ„¢ Interface
* Common I/O bus
* JEDEC-standard pinout and package
* Double Data Rate interfac.
Therefore, the SigmaDDR-II+ SRAM interface and truth table are optimized for burst reads and writes. Common I/O SRAMs a.
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